As an important method for error correction coding, BCH codes have been widely used in the fields of communications and consumer electronics. The term “BCH code” is an abbreviation for Bose, Ray-Chaudhuri and Hocquenghem. The BCH code is a cyclic code for correcting a plurality of random errors, and it can be described by the root of a generator polynomial g(x). With the development of technology, people are increasingly demanding higher and higher error correction capability of BCH and, accordingly, people are much more sensitive to the performance of BCH codecs. There are mainly two kinds of BCH coding. One is serial coding, and the other is parallel coding. Serial coding is generally used in situations where speeds are not required to be high, because serial coding saves the most of area. However, in situations where speeds are required to be very high, parallel coding needs to be used.
At present, the parallel coding method commonly used comprises carrying out BCH coding by a linear feedback shift register (LFSR) method, as shown in FIG. 1. However, as the error correction capability and data bandwidths are constantly increasingly, it is often difficult for the parallel LFSR structure used in a BCH encoder to satisfy the clock frequency, due to a path which is too long. The patent application No. 200810065971.9 discloses “a circuit, an encoder and a method for parallel BCH coding”, which use a parallel iteration coding circuit comprising several constant vector multipliers, a constant matrix multiplier and some XOR gates. Although the fan-out of such circuit is controlled compared with the LFSR structure, the multipliers occupy a too large area.
To sum up, it is evident that the existing BCH coding circuits are inconvenient and have defects in practical applications, thus it is necessary to improve them.